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» Fault simulation on reconfigurable hardware
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MICRO
2010
IEEE
167views Hardware» more  MICRO 2010»
13 years 7 months ago
Erasing Core Boundaries for Robust and Configurable Performance
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott ...
ICCAD
2006
IEEE
183views Hardware» more  ICCAD 2006»
14 years 6 months ago
Soft error derating computation in sequential circuits
Soft error tolerant design becomes more crucial due to exponential increase in the vulnerability of computer systems to soft errors. Accurate estimation of soft error rate (SER), ...
Hossein Asadi, Mehdi Baradaran Tahoori
ATS
2009
IEEE
111views Hardware» more  ATS 2009»
14 years 4 months ago
Dynamic Compaction in SAT-Based ATPG
SAT-based automatic test pattern generation has several advantages compared to conventional structural procedures, yet often yields too large test sets. We present a dynamic compa...
Alejandro Czutro, Ilia Polian, Piet Engelke, Sudha...
DDECS
2007
IEEE
143views Hardware» more  DDECS 2007»
14 years 3 months ago
An Experimental Analysis of SEU Sensitiveness on System Knowledge-based Hardening Techniques
Logic Soft Errors caused by radiation are a major concern when working with circuits that need to operate in harsh environments, such as space or avionics applications, where soft ...
Oscar Ruano, Pilar Reyes, Juan Antonio Maestro, Lu...
ITC
2002
IEEE
86views Hardware» more  ITC 2002»
14 years 2 months ago
Incremental Diagnosis of Multiple Open-Interconnects
With increasing chip interconnect distances, openinterconnect is becoming an important defect. The main challenge with open-interconnects stems from its non-deterministic real-lif...
Jiang Brandon Liu, Andreas G. Veneris, Hiroshi Tak...