11 search results - page 1 / 3 » Faults Coverage Improvement Based on Fault Simulation and Pa... |
DSD
2010
IEEE
13 years 5 months ago
2010
IEEE
— A method how to improve the coverage of single faults in combinational circuits is proposed. The method is based on Concurrent Error Detection, but uses a fault simulation to f...
DSN
2008
IEEE
14 years 1 months ago
2008
IEEE
In the near future, hardware is expected to become increasingly vulnerable to faults due to continuously decreasing feature size. Software-level symptoms have previously been used...
ETS
2009
IEEE
13 years 4 months ago
2009
IEEE
Structural on-line self-test may be performed to detect permanent faults and avoid their accumulation. This paper improves concurrent BIST techniques based on a deterministic test ...
ICCAD
1995
IEEE
13 years 10 months ago
1995
IEEE
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...
ITC
2003
IEEE
14 years 4 days ago
2003
IEEE
In this paper, we study the possibility of using logic defect-level prediction models to predict the detection behavior of statistical timing defects. We compare two known logic m...