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ESANN
2006
13 years 8 months ago
Parallel hardware implementation of a broad class of spiking neurons using serial arithmetic
Abstract. Current digital, directly mapped implementations of spiking neural networks use serial processing and parallel arithmetic. On a standard CPU, this might be the good choic...
Benjamin Schrauwen, Jan M. Van Campenhout
FPL
2010
Springer
210views Hardware» more  FPL 2010»
13 years 5 months ago
A Compact Transactional Memory Multiprocessor System on FPGA
In this paper we present a rapid prototyping platform on a single Field Programmable Gate Array (FPGA) with support for software transactional memory. The system is composed only b...
Matteo Pusceddu, Simone Ceccolini, Gianluca Palerm...
ERSA
2009
387views Hardware» more  ERSA 2009»
13 years 5 months ago
Implementation of the Gauss-Newton Algorithm for Non-linear Least-mean-squares Fitting in FPGA Devices
Abstract-- The paper presents the implementation of nonlinear least-squares regression in a Field Programmable Gate Array (FPGA) device. The implemented algorithm is very performan...
Andrea Abba, Antonio Manenti, Andrea Suardi, Angel...
FPGA
2001
ACM
162views FPGA» more  FPGA 2001»
13 years 12 months ago
Reprogrammable network packet processing on the field programmable port extender (FPX)
A prototype platform has been developed that allows processing of packets at the edge of a multi-gigabit-per-second network switch. This system, the Field Programmable Port Extend...
John W. Lockwood, Naji Naufel, Jonathan S. Turner,...
FPGA
2007
ACM
106views FPGA» more  FPGA 2007»
14 years 1 months ago
A synthesizable datapath-oriented embedded FPGA fabric
We present an architecture for a synthesizable datapathoriented Field Programmable Gate Array (FPGA) core which can be used to provide post-fabrication flexibility to a Systemon-...
Steven J. E. Wilton, Chun Hok Ho, Philip Heng Wai ...