172 search results - page 8 / 35 » FinFET-based SRAM design |
HPCA
2011
IEEE
12 years 11 months ago
2011
IEEE
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Many embedded systems use a simple pipelined RISC processor for computation and an on-chip SRAM for data storage. We present an enhancement called Intelligent SRAM (ISRAM) that co...
TC
2010
13 years 5 months ago
2010
—A dynamic multiway segment tree (DMST) is proposed for IP lookups in this paper. DMST is designed for dynamic routing tables that can dynamically insert and delete prefixes. DMS...
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
Critical issues in designing a high speed, low power static RAM in deep submicron technologies are described along with the design techniques used to overcome them. With appropria...
GLVLSI
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper presents the design and evaluation of a new SRAM cell made of nine transistors (9T). The proposed 9T cell utilizes a scheme with separate read and write wordlines; it i...