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ISSS
1999
IEEE
168views Hardware» more  ISSS 1999»
14 years 2 months ago
Automatic Architectural Synthesis of VLIW and EPIC Processors
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
Shail Aditya, B. Ramakrishna Rau, Vinod Kathail
CASES
2007
ACM
14 years 1 months ago
A low power front-end for embedded processors using a block-aware instruction set
Energy, power, and area efficiency are critical design concerns for embedded processors. Much of the energy of a typical embedded processor is consumed in the front-end since inst...
Ahmad Zmily, Christos Kozyrakis
DATE
2009
IEEE
87views Hardware» more  DATE 2009»
14 years 1 months ago
Runtime reconfiguration of custom instructions for real-time embedded systems
This paper explores runtime reconfiguration of custom instructions in the context of multi-tasking real-time embedded systems. We propose a pseudo-polynomial time algorithm that mi...
Huynh Phung Huynh, Tulika Mitra
HICSS
2002
IEEE
128views Biometrics» more  HICSS 2002»
14 years 2 months ago
Flexible Instructional Strategies for E-learning
This paper provides an overview on a German lighthouse research project called L3 in the area of e-learning systems that supply e-learning services via a virtual private network. ...
Michael Altenhofen, Joachim Schaper
ISCA
2008
IEEE
109views Hardware» more  ISCA 2008»
14 years 4 months ago
Flexible Hardware Acceleration for Instruction-Grain Program Monitoring
Instruction-grain program monitoring tools, which check and analyze executing programs at the granularity of individual instructions, are invaluable for quickly detecting bugs and...
Shimin Chen, Michael Kozuch, Theodoros Strigkos, B...