1446 search results - page 212 / 290 » Formal analysis of hardware requirements |
ICCD
2002
IEEE
14 years 5 months ago
2002
IEEE
Low power design techniques have been employed for more than two decades, however an emerging problem is satisfying the test power constraints for avoiding destructive test and im...
ICCAD
2006
IEEE
14 years 5 months ago
2006
IEEE
As wireless LAN devices become more prevalent in the consumer electronics market, there is an ever increasing pressure to reduce their overall cost. The test cost of such devices ...
ICCAD
2006
IEEE
14 years 5 months ago
2006
IEEE
Meeting timing constraint is one of the most important issues for modern design automation tools. This situation is exacerbated with the existence of process variation. Current hi...
ICCAD
2002
IEEE
14 years 5 months ago
2002
IEEE
The simulation of on-chip inductance using PEEC-based circuit analysis methods often requires the solution of a subproblem where an extracted inductance matrix must be multiplied ...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
— MPSoC is evolving towards processor-pool (PP)-based architectures, which employ hierarchical on-chip network for inter- and intra-PP communication. Since the design space of PP...