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» Formal analysis of hardware requirements
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VLSID
2003
IEEE
180views VLSI» more  VLSID 2003»
14 years 8 months ago
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
Pao-Ann Hsiung, Shu-Yu Cheng
ICCAD
1994
IEEE
65views Hardware» more  ICCAD 1994»
14 years 2 days ago
Incremental formal design verification
Language containment is a method for design verification that involves checking if the behavior of the system to be verified is a subset of the behavior of the specifications (pro...
Gitanjali Swamy, Robert K. Brayton
DATE
2008
IEEE
113views Hardware» more  DATE 2008»
14 years 2 months ago
Random Stimulus Generation using Entropy and XOR Constraints
Despite the growing research effort in formal verification, constraint-based random simulation remains an integral part of design validation, especially for large design componen...
Stephen Plaza, Igor L. Markov, Valeria Bertacco
CAV
1997
Springer
202views Hardware» more  CAV 1997»
14 years 3 days ago
HYTECH: A Model Checker for Hybrid Systems
A hybrid system is a dynamical system whose behavior exhibits both discrete and continuous change. A hybrid automaton is a mathematical model for hybrid systems, which combines, i...
Thomas A. Henzinger, Pei-Hsin Ho, Howard Wong-Toi
ANTSW
2010
Springer
13 years 6 months ago
Formal Verification of Probabilistic Swarm Behaviours
Robot swarms provide a way for a number of simple robots to work together to carry out a task. While swarms have been found to be adaptable, fault-tolerant and widely applicable, d...
Savas Konur, Clare Dixon, Michael Fisher