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» Formalizing On Chip Communications in a Functional Style
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DAGSTUHL
2006
13 years 11 months ago
Formalizing On Chip Communications in a Functional Style
Julien Schmaltz, Dominique Borrione
FAC
2008
97views more  FAC 2008»
13 years 9 months ago
A functional formalization of on chip communications
This paper presents a formal model and a systematic approach to the validation of communication tures at a high level of abstraction. This model is described mathematically by a fu...
Julien Schmaltz, Dominique Borrione
FMCAD
2004
Springer
14 years 1 months ago
A Functional Approach to the Formal Specification of Networks on Chip
We present a functional approach, based on the ACL2 logic, for the specification of system on a chip communication architectures. Our decomposition of the communications allows the...
Julien Schmaltz, Dominique Borrione
ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
14 years 2 months ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
DATE
2004
IEEE
134views Hardware» more  DATE 2004»
14 years 1 months ago
Cost-Efficient Block Verification for a UMTS Up-Link Chip-Rate Coprocessor
ASIC designs for future communication applications cannot be simulated exhaustively. Formal Property Checking is a powerful technology to overcome the limitations of current funct...
Klaus Winkelmann, Hans-Joachim Trylus, Dominik Sto...