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ICCD
2006
IEEE
128views Hardware» more  ICCD 2006»
15 years 11 months ago
Polaris: A System-Level Roadmap for On-Chip Interconnection Networks
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...
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ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
15 years 11 months ago
Platform-based resource binding using a distributed register-file microarchitecture
Behavior synthesis and optimization beyond the register transfer level require an efficient utilization of the underlying platform features. This paper presents a platform-based ...
Jason Cong, Yiping Fan, Wei Jiang
ICCAD
2003
IEEE
221views Hardware» more  ICCAD 2003»
15 years 11 months ago
Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-time Embedded Systems
Abstract— Dynamic voltage scaling (DVS) is a powerful technique for reducing dynamic power consumption in a computing system. However, as technology feature size continues to sca...
Le Yan, Jiong Luo, Niraj K. Jha
ICCAD
2002
IEEE
141views Hardware» more  ICCAD 2002»
15 years 11 months ago
A hierarchical modeling framework for on-chip communication architectures
— The communication sub-system of complex IC systems is increasingly critical for achieving system performance. Given this, it is important that the on-chip communication archite...
Xinping Zhu, Sharad Malik
PEPM
2009
ACM
15 years 11 months ago
Bidirectional data-flow analyses, type-systematically
We show that a wide class of bidirectional data-flow analyses and program optimizations based on them admit declarative descriptions in the form of type systems. The salient feat...
Maria João Frade, Ando Saabas, Tarmo Uustal...
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