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DATE
2009
IEEE
136views Hardware» more  DATE 2009»
14 years 4 months ago
A novel approach to entirely integrate Virtual Test into test development flow
– In this paper, we present an open architecture Virtual Test Environment (VTE) which can be easily integrated into various modularized Automatic Test Systems (ATS) compliant to ...
Ping Lu, Daniel Glaser, Gürkan Uygur, Klaus H...
XPU
2004
Springer
14 years 2 months ago
Generative Acceptance Testing for Difficult-to-Test Software
Abstract. While there are many excellent acceptance testing tools and frameworks available today, this paper presents an alternative approach, involving generating code from tests ...
Jennitta Andrea
ITC
2002
IEEE
135views Hardware» more  ITC 2002»
14 years 2 months ago
Test Coverage: What Does It Mean When a Board Test Passes?
ct Characterizing board test coverage as a percentage of devices or nodes having tests does not accurately portray coverage, especially in a limited access testing environment that...
Kathy Hird, Kenneth P. Parker, Bill Follis
DATE
1999
IEEE
102views Hardware» more  DATE 1999»
14 years 1 months ago
Minimal Length Diagnostic Tests for Analog Circuits using Test History
In this paper we propose an efficient transient test generation method to comprehensively test analog circuits using minimum test time. A divide and conquer strategy is formulated...
Alfred V. Gomes, Abhijit Chatterjee
DELTA
2008
IEEE
14 years 3 months ago
AES-Based BIST: Self-Test, Test Pattern Generation and Signature Analysis
Re-using embedded resources for implementing builtin self test mechanisms allows test cost reduction. In this paper we demonstrate how to implement costefficient built-in self tes...
M. Doulcier, Marie-Lise Flottes, Bruno Rouzeyre