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DATE
2006
IEEE
111views Hardware» more  DATE 2006»
14 years 1 months ago
Functional test generation using property decompositions for validation of pipelined processors
Functional validation is a major bottleneck in pipelined processor design. Simulation using functional test vectors is the most widely used form of processor validation. While exi...
Heon-Mo Koo, Prabhat Mishra
GLVLSI
2006
IEEE
95views VLSI» more  GLVLSI 2006»
14 years 1 months ago
Test generation using SAT-based bounded model checking for validation of pipelined processors
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...
Heon-Mo Koo, Prabhat Mishra
DATE
2005
IEEE
115views Hardware» more  DATE 2005»
14 years 1 months ago
Functional Coverage Driven Test Generation for Validation of Pipelined Processors
Functional verification of microprocessors is one of the most complex and expensive tasks in the current system-on-chip design process. A significant bottleneck in the validatio...
Prabhat Mishra, Nikil D. Dutt
CODES
2008
IEEE
13 years 9 months ago
Specification-based compaction of directed tests for functional validation of pipelined processors
Functional validation is a major bottleneck in microprocessor design methodology. Simulation is the widely used method for functional validation using billions of random and biase...
Heon-Mo Koo, Prabhat Mishra
DATE
2004
IEEE
174views Hardware» more  DATE 2004»
13 years 11 months ago
Graph-Based Functional Test Program Generation for Pipelined Processors
Functional verification is widely acknowledged as a major bottleneck in microprocessor design. While early work on specification driven functional test program generation has prop...
Prabhat Mishra, Nikil Dutt