694 search results - page 35 / 139 » Gate Sizing Using a Statistical Delay Model |
ICCAD
2000
IEEE
14 years 17 days ago
2000
IEEE
ct Static timing analysis has traditionally used the PERT method for identifying the critical path of a digital circuit. Due to the influence of the slope of a signal at a particul...
DAC
2007
ACM
14 years 10 months ago
2007
ACM
In this paper we address the the growing issue of junction tunneling leakage (Ijunc) at the circuit level. Specifically, we develop a fast approach to analyze the state-dependent ...
ISVLSI
2008
IEEE
14 years 3 months ago
2008
IEEE
In nanometer regime, the effects of process variations are dominating circuit performance, power and reliability of circuits. Hence, it is important to properly manage variation e...
KDD
2004
ACM
14 years 2 months ago
2004
ACM
Mark-recapture models have for many years been used to estimate the unknown sizes of animal and bird populations. In this article we adapt a finite mixture mark-recapture model i...
BMCBI
2005
13 years 9 months ago
2005
Background: With the explosion of microarray studies, an enormous amount of data is being produced. Systematic integration of gene expression data from different sources increases...