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RSP
2005
IEEE
164views Control Systems» more  RSP 2005»
14 years 1 months ago
High Level Synthesis for Data-Driven Applications
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...
Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley,...
FCCM
2008
IEEE
160views VLSI» more  FCCM 2008»
14 years 2 months ago
Facilitating Processor-Based DPR Systems for non-DPR Experts
Currently, only Xilinx Field Programmable Gate Arrays (FPGAs) support Dynamic Partial Reconfiguration (DPR). While there is currently some Computer Aided Design (CAD) tool support...
Edward Chen, William A. Gruver, Dorian Sabaz, Lesl...
DATE
2006
IEEE
88views Hardware» more  DATE 2006»
14 years 1 months ago
Enabling fine-grain leakage management by voltage anchor insertion
Functional unit shutdown based on MTCMOS devices is effective for leakage reduction in aggressively scaled technologies. However, the applicability of MTCMOS-based shutdown in a s...
Pietro Babighian, Luca Benini, Alberto Macii, Enri...
LREC
2010
237views Education» more  LREC 2010»
13 years 9 months ago
Flexible Ontology Population from Text: The OwlExporter
Ontology population from text is becoming increasingly important for NLP applications. Ontologies in OWL format provide for a standardized means of modeling, querying, and reasoni...
René Witte, Ninus Khamis, Juergen Rilling
DAC
2003
ACM
14 years 8 months ago
Distributed sleep transistor network for power reduction
Sleep transistors are effective to reduce dynamic and leakage power. The cluster-based design was proposed to reduce the sleep transistor area by clustering gates to minimize the ...
Changbo Long, Lei He