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ICCAD
1999
IEEE
99views Hardware» more  ICCAD 1999»
14 years 1 months ago
Concurrent logic restructuring and placement for timing closure
: In this paper, an algorithm for simultaneous logic restructuring and placement is presented. This algorithm first constructs a set of super-cells along the critical paths and the...
Jinan Lou, Wei Chen, Massoud Pedram
IV
1999
IEEE
109views Visualization» more  IV 1999»
14 years 1 months ago
2D Texture Refinement Using Procedural Functions
In Computer Graphics, aliasing is a problem which is always present when discrete elements are mapped to continuous functions or vice-versa. Although there is no general solution ...
Esteban Walter Gonzalez Clua, Marcelo Dreux, Marce...
CODES
1998
IEEE
14 years 1 months ago
A path analysis based partitioning for time constrained embedded systems
The HW/SW partitioning problem addressed in this paper is one of the key steps in the co-design flow of heterogeneous embedded systems. Generally the aim is to provide solutions t...
Luc Bianco, Michel Auguin, Guy Gogniat, Alain Pega...
ICCAD
1998
IEEE
82views Hardware» more  ICCAD 1998»
14 years 1 months ago
Symbolic model checking of process networks using interval diagram techniques
In this paper, an approach to symbolic model checking of process networks is introduced. It is based on interval decision diagrams (IDDs), a representation of multi-valued functio...
Karsten Strehl, Lothar Thiele
SIGIR
2010
ACM
14 years 1 months ago
Metrics for assessing sets of subtopics
To evaluate the diversity of search results, test collections have been developed that identify multiple intents for each query. Intents are the different meanings or facets that...
Filip Radlinski, Martin Szummer, Nick Craswell