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» Generating high performance pruned FFT implementations
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SIGMOD
2006
ACM
149views Database» more  SIGMOD 2006»
14 years 8 months ago
Efficient query processing on unstructured tetrahedral meshes
Modern scientific applications consume massive volumes of data produced by computer simulations. Such applications require new data management capabilities in order to scale to te...
Stratos Papadomanolakis, Anastassia Ailamaki, Juli...
ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
14 years 5 months ago
High-level synthesis using computation-unit integrated memories
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
CODES
2007
IEEE
14 years 3 months ago
Predator: a predictable SDRAM memory controller
Memory requirements of intellectual property components (IP) in contemporary multi-processor systems-on-chip are increasing. Large high-speed external memories, such as DDR2 SDRAM...
Benny Akesson, Kees Goossens, Markus Ringhofer
LCPC
2005
Springer
14 years 2 months ago
Optimizing Packet Accesses for a Domain Specific Language on Network Processors
Programming network processors remains a challenging task since their birth until recently when high-level programming environments for them are emerging. By employing domain speci...
Tao Liu, Xiao-Feng Li, Lixia Liu, Chengyong Wu, Ro...
ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
14 years 1 months ago
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
Venkata Syam P. Rapaka, Diana Marculescu