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IPPS
2007
IEEE
14 years 1 months ago
Towards Optimal Multi-level Tiling for Stencil Computations
Stencil computations form the performance-critical core of many applications. Tiling and parallelization are two important optimizations to speed up stencil computations. Many til...
Lakshminarayanan Renganarayanan, Manjukumar Harthi...
HPCA
2003
IEEE
14 years 8 months ago
A Statistically Rigorous Approach for Improving Simulation Methodology
Due to cost, time, and flexibility constraints, simulators are often used to explore the design space when developing a new processor architecture, as well as when evaluating the ...
Joshua J. Yi, David J. Lilja, Douglas M. Hawkins
SAT
2010
Springer
158views Hardware» more  SAT 2010»
13 years 11 months ago
Dynamic Scoring Functions with Variable Expressions: New SLS Methods for Solving SAT
Abstract. We introduce a new conceptual model for representing and designing Stochastic Local Search (SLS) algorithms for the propositional satisfiability problem (SAT). Our model...
Dave A. D. Tompkins, Holger H. Hoos
DAC
2011
ACM
12 years 7 months ago
Litmus tests for comparing memory consistency models: how long do they need to be?
Memory consistency litmus tests are small parallel programs that are designed to illustrate subtle differences between memory consistency models by exhibiting different outcomes...
Sela Mador-Haim, Rajeev Alur, Milo M. K. Martin
CODES
2007
IEEE
14 years 1 months ago
Simultaneous synthesis of buses, data mapping and memory allocation for MPSoC
Heterogeneous multiprocessors are emerging as the dominant implementation approach to embedded multiprocessor systems. In addition to having processing elements suited to the targ...
Brett H. Meyer, Donald E. Thomas