387 search results - page 57 / 78 » Global Synchronization in Sensornets |
ISCA
2011
IEEE
12 years 11 months ago
2011
IEEE
As we move to large manycores, the hardware-based global checkpointing schemes that have been proposed for small shared-memory machines do not scale. Scalability barriers include ...
ATAL
2003
Springer
14 years 23 days ago
2003
Springer
We present a new polynomial-space algorithm, called Adopt, for distributed constraint optimization (DCOP). DCOP is able to model a large class of collaboration problems in multi-a...
DAC
2000
ACM
14 years 8 months ago
2000
ACM
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...
VLSID
2005
IEEE
14 years 8 months ago
2005
IEEE
Interest in asynchronous circuit design is increasing due to its promise of efficient designs. The quiescent nature of asynchronous circuits allows them to remain in a stable stat...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
Wire pipelining emerges as a new necessity for global wires due to increasing wire delay, shrinking clock period and growing chip size. Existing approaches on wire pipelining are ...