5889 search results - page 58 / 1178 » Graph Layout Problems |
DATE
2006
IEEE
14 years 4 months ago
2006
IEEE
High level synthesis transformations play a major part in shaping the properties of the final circuit. However, most optimizations are performed without much knowledge of the fina...
IV
2005
IEEE
14 years 3 months ago
2005
IEEE
In this paper we describe a tool to improve interfunctional communication of project plans by displaying them as a metro map. Our tool automatically lays out plans using a multicr...
ASPDAC
2007
ACM
14 years 1 months ago
2007
ACM
The memory subsystem is a major contributor to the performance, power, and area of complex SoCs used in feature rich multimedia products. Hence, memory architecture of the embedded...
WSC
2008
14 years 8 days ago
2008
Developing mechanisms for the efficient exchange of information between simulations and other manufacturing tools is a critical problem. For many areas of manufacturing, neither r...
EOR
2007
13 years 10 months ago
2007
In a recent paper, Savas, Batta and Nagi [14] consider the optimal placement of a finite-sized facility in the presence of arbitrarily-shaped barriers under rectilinear travel. T...