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ICCAD
2005
IEEE
94views Hardware» more  ICCAD 2005»
15 years 11 months ago
Post-placement voltage island generation under performance requirement
High power consumption not only leads to short battery life for handheld devices, but also causes on-chip thermal and reliability problems in general. As power consumption is prop...
Huaizhi Wu, I-Min Liu, Martin D. F. Wong, Yusu Wan...
ICCAD
2003
IEEE
137views Hardware» more  ICCAD 2003»
15 years 11 months ago
Bus-Driven Floorplanning
In this paper, we present an integrated approach to floorplanning and bus planning, i.e., bus-driven floorplanning (BDF). We are given a set of circuit blocks and the bus speciï...
Hua Xiang, Xiaoping Tang, Martin D. F. Wong
ICCAD
2001
IEEE
217views Hardware» more  ICCAD 2001»
15 years 11 months ago
ASF: A Practical Simulation-Based Methodology for the Synthesis of Custom Analog Circuits
: This paper describes ASF, a novel cell-level analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufactu...
Michael Krasnicki, Rodney Phelps, James R. Hellums...
ICCAD
2001
IEEE
163views Hardware» more  ICCAD 2001»
15 years 11 months ago
Predicting the Performance of Synchronous Discrete Event Simulation Systems
In this paper we propose a model to predict the performance of synchronous discrete event simulation. The model considers parameters including the number of active objects per cyc...
Jinsheng Xu, Moon-Jung Chung
147
Voted
ISQED
2010
IEEE
227views Hardware» more  ISQED 2010»
15 years 9 months ago
Post-synthesis sleep transistor insertion for leakage power optimization in clock tree networks
Leakage power has grown significantly and is a major challenge in SoC design. Among SoC's components, clock distribution network power accounts for a large portion of chip po...
Houman Homayoun, Shahin Golshan, Eli Bozorgzadeh, ...