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» Hardware Reuse at the Behavioral Level
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DATE
2002
IEEE
95views Hardware» more  DATE 2002»
14 years 1 months ago
Macromodeling of Digital I/O Ports for System EMC Assessment
This paper addresses the development of accurate and efficient behavioral models of digital integrated circuit input and output ports for EMC and signal integrity simulations. A ...
Igor S. Stievano, Flavio G. Canavero, Ivan A. Maio...
ICCD
2005
IEEE
128views Hardware» more  ICCD 2005»
14 years 5 months ago
Automatic Synthesis of Composable Sequential Quantum Boolean Circuits
This paper presents a methodology to transfer self-timed circuit specifications into sequential quantum Boolean circuits (SQBCs) and composable SQBCs (CQBCs). State graphs (SGs) a...
Li-Kai Chang, Fu-Chiung Cheng
DATE
2009
IEEE
143views Hardware» more  DATE 2009»
14 years 3 months ago
Time and memory tradeoffs in the implementation of AUTOSAR components
—The adoption of AUTOSAR in the development of automotive electronics can increase the portability and reuse of functional components. Inside each component, the behavior is repr...
Alberto Ferrari, Marco Di Natale, Giacomo Gentile,...
ICCAD
1998
IEEE
95views Hardware» more  ICCAD 1998»
14 years 22 days ago
Control generation for embedded systems based on composition of modal processes
In traditional distributed embedded system designs, control information is often replicated across several processes and kept coherent by application-specific mechanisms. Conseque...
Pai H. Chou, Ken Hines, Kurt Partridge, Gaetano Bo...
ETS
2009
IEEE
98views Hardware» more  ETS 2009»
13 years 6 months ago
Increasing Robustness of SAT-based Delay Test Generation Using Efficient Dynamic Learning Techniques
Due to the increased speed in modern designs, testing for delay faults has become an important issue in the postproduction test of manufactured chips. A high fault coverage is nee...
Stephan Eggersglüß, Rolf Drechsler