398 search results - page 48 / 80 » Hardware Reuse at the Behavioral Level |
ISQED
2006
IEEE
14 years 3 months ago
2006
IEEE
This paper proposes a simulation-based soft error estimation methodology for computer systems. Accumulating soft error rates (SERs) of all memories in a computer system results in...
DATE
2005
IEEE
14 years 3 months ago
2005
IEEE
In this paper, we present a SoC design methodology joining the capabilities of UML and SystemC to operate at systemlevel. We present a UML 2.0 profile of the SystemC language expl...
ITC
2003
IEEE
14 years 3 months ago
2003
IEEE
The long term impact of MEMS technology will be in its ability to integrate novel sensing and actuation functionality on traditional computing and communication devices enabling t...
ACSD
1998
IEEE
14 years 2 months ago
1998
IEEE
This paper makes the idea of memory shadowing [5] applicable to symbolic ternary simulation. Memory shadowing, an extension of Burch and Dill's pipeline verification method [...
DATE
1998
IEEE
14 years 2 months ago
1998
IEEE
One of the main tasks within the high-level synthesis (HLS) process is the verification problem to prove automatically the correctness of the synthesis results. Currently, the res...