152 search results - page 5 / 31 » Hardware Software Partitioning with Iterative Improvement He... |
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
The allocation of device variables on I/O registers affects the code size and performance of an I/O device driver. This work seeks the allocation with the minimal software or hard...
ASPDAC
2000
ACM
13 years 11 months ago
2000
ACM
Multilevel Fiduccia-Mattheyses MLFM hypergraph partitioning 3, 22, 24 is a fundamental optimization in VLSI CAD physical design. The leading implementation, hMetis 23 , has sinc...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
Customization of processor architectures through Instruction Set Extensions (ISEs) is an effective way to meet the growing performance demands of embedded applications. A high-qua...
VLSI
2007
Springer
14 years 1 months ago
2007
Springer
— Software simulation remains the most used method for VHDL RTL functional verification. The functional verification process essentially consists of two parts. The first one is t...
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
Abstract— Today’s embedded systems are typically distributed and more often confronted with timevarying demands. Existing methodologies that optimize the partitioning of comput...