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» Hardware Synthesis from Term Rewriting Systems
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FPL
2007
Springer
137views Hardware» more  FPL 2007»
14 years 3 months ago
Multi-processor System-level Synthesis for Multiple Applications on Platform FPGA
Multiprocessor systems-on-chip (MPSoC) are being developed in increasing numbers to support the high number of applications running on modern embedded systems. Designing and progr...
Akash Kumar, Shakith Fernando, Yajun Ha, Bart Mesm...
IESS
2007
Springer
92views Hardware» more  IESS 2007»
14 years 3 months ago
An Interactive Model Re-Coder for Efficient SoC Specification
To overcome the complexity in System-on-Chip (SoC) design, researchers have developed sophisticated design flows that significantly reduce the development time through automation...
Pramod Chandraiah, Rainer Dömer
ISSS
1998
IEEE
120views Hardware» more  ISSS 1998»
14 years 1 months ago
Application of Instruction Analysis/Synthesis Tools to x86's Functional Unit Allocation
Designing a cost effective superscalar architecture for x86 compatible microprocessors is a challenging task in terms of both technical difficulty and commercial value. One of the...
Ing-Jer Huang, Ping-Huei Xie
ICCAD
2007
IEEE
165views Hardware» more  ICCAD 2007»
14 years 22 days ago
Automated refinement checking of concurrent systems
Stepwise refinement is at the core of many approaches to synthesis and optimization of hardware and software systems. For instance, it can be used to build a synthesis approach for...
Sudipta Kundu, Sorin Lerner, Rajesh Gupta
ASPDAC
1995
ACM
79views Hardware» more  ASPDAC 1995»
14 years 13 days ago
Search space reduction in high level synthesis by use of an initial circuit
Most existing high-level synthesis(HLS) systems attempt to generate a circuit from a behavioral description \out of the void", using the entire design space as the search dom...
Atsushi Masuda, Hiroshi Imai, Jeffery P. Hansen, M...