951 search results - page 61 / 191 » Hardware design experiences in ZebraNet |
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE
Long interconnects are becoming an increasingly important problem from both power and performance perspectives. This motivates designers to adopt on-chip network-based communicati...
FPL
2007
Springer
14 years 1 months ago
2007
Springer
In this paper, we present the DWARV C-to-VHDL generation toolset. The toolset provides support for broad range of application domains. It exploits the operation parallelism, avail...
DATE
2002
IEEE
14 years 20 days ago
2002
IEEE
This paper explores the role of data analysis methods to support system-level designers in characterising the performance of embedded applications. In particular, we address the p...
DATE
2010
IEEE
14 years 25 days ago
2010
IEEE
— In this paper, we examine the impact of application task mapping on the reliability of MPSoC in the presence of single-event upsets (SEUs). We propose a novel soft erroraware d...
ICCAD
2008
IEEE
14 years 4 months ago
2008
IEEE
The ability to integrate diverse components such as processor cores, memories, custom hardware blocks and complex network-on-chip (NoC) communication frameworks onto a single chip...