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DAC
2003
ACM
14 years 8 months ago
Dynamic hardware/software partitioning: a first approach
Partitioning an application among software running on a microprocessor and hardware co-processors in on-chip configurable logic has been shown to improve performance and energy co...
Greg Stitt, Roman L. Lysecky, Frank Vahid
CODES
1998
IEEE
13 years 12 months ago
Communication synthesis and HW/SW integration for embedded system design
The implementation of codesign applications generally requires the use of heterogeneous resources (e.g., processor cores, hardware accelerators) in one system. Interfacing hardwar...
Guy Gogniat, Michel Auguin, Luc Bianco, Alain Pega...
DATE
2006
IEEE
120views Hardware» more  DATE 2006»
13 years 11 months ago
Battery-aware code partitioning for a text to speech system
The advent of multi-core embedded processors has brought along new challenges for embedded system design. This paper presents an efficient, battery aware, code partitioning techni...
Anirban Lahiri, Anupam Basu, Monojit Choudhury, Sr...
GLVLSI
2006
IEEE
126views VLSI» more  GLVLSI 2006»
14 years 1 months ago
Hardware/software partitioning of operating systems: a behavioral synthesis approach
In this paper we propose a hardware real time operating system (HW-RTOS) solution that makes use of a dedicated hardware in order to replace the standard support provided by the P...
Sathish Chandra, Francesco Regazzoni, Marcello Laj...
DATE
2007
IEEE
85views Hardware» more  DATE 2007»
14 years 1 months ago
Low-power warp processor for power efficient high-performance embedded systems
Researchers previously proposed warp processors, a novel architecture capable of transparently optimizing an executing application by dynamically re-implementing critical kernels ...
Roman L. Lysecky