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ICCAD
2007
IEEE
128views Hardware» more  ICCAD 2007»
14 years 7 months ago
Module assignment for pin-limited designs under the stacked-Vdd paradigm
Abstract— This paper addresses the module assignment problem in pinlimited designs under the stacked-Vdd circuit paradigm. A partition-based algorithm is presented for efficient...
Yong Zhan, Tianpei Zhang, Sachin S. Sapatnekar
ICCAD
2005
IEEE
147views Hardware» more  ICCAD 2005»
14 years 7 months ago
NoCEE: energy macro-model extraction methodology for network on chip routers
In this paper we present NoCEE, a fast and accurate method for extracting energy models for packet-switched Network on Chip (NoC) routers. Linear regression is used to model the r...
Jeremy Chan, Sri Parameswaran
ICCAD
2005
IEEE
125views Hardware» more  ICCAD 2005»
14 years 7 months ago
Robust mixed-size placement under tight white-space constraints
A novel and very simple correct-by-construction top-down methodology for high-utilization mixed-size placement is presented. The PolarBear algorithm combines recursive cutsize-dri...
Jason Cong, Michail Romesis, Joseph R. Shinnerl
ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
14 years 7 months ago
Hardware synthesis from guarded atomic actions with performance specifications
We present a new hardware synthesis methodology for guarded atomic actions (or rules), which satisfies performance-related scheduling specifications provided by the designer. The ...
Daniel L. Rosenband
ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
14 years 7 months ago
High-level synthesis using computation-unit integrated memories
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
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