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ISQED
2006
IEEE
78views Hardware» more  ISQED 2006»
14 years 1 months ago
Simultaneous Statistical Delay and Slew Optimization for Interconnect Pipelines
Process variation has become a major concern in the design of many nanometer circuits, including interconnect pipelines. This paper develops closed-form models to predict the dela...
Andrew Havlir, David Z. Pan
ICCAD
1997
IEEE
86views Hardware» more  ICCAD 1997»
13 years 11 months ago
Interconnect design for deep submicron ICs
Interconnect has become the dominating factor in determining circuit performance and reliability in deep submicron designs. In this embedded tutorial, we first discuss the trends...
Jason Cong, David Zhigang Pan, Lei He, Cheng-Kok K...
ICCAD
2002
IEEE
98views Hardware» more  ICCAD 2002»
14 years 4 months ago
On-chip interconnect modeling by wire duplication
In this paper, we present a novel wire duplication-based interconnect modeling technique. The proposed modeling technique exploits the sparsity of the L 1 matrix, where L is the ...
Guoan Zhong, Cheng-Kok Koh, Kaushik Roy
SLIP
2009
ACM
14 years 2 months ago
Through-silicon-via aware interconnect prediction and optimization for 3D stacked ICs
Individual dies in 3D integrated circuits are connected using throughsilicon-vias (TSVs). TSVs not only increase manufacturing cost, but also incur silicon area, delay, and power ...
Dae Hyun Kim, Saibal Mukhopadhyay, Sung Kyu Lim
ICCAD
2004
IEEE
88views Hardware» more  ICCAD 2004»
14 years 4 months ago
Interconnect lifetime prediction under dynamic stress for reliability-aware design
Thermal effects are becoming a limiting factor in highperformance circuit design due to the strong temperaturedependence of leakage power, circuit performance, IC package cost and...
Zhijian Lu, Wei Huang, John Lach, Mircea R. Stan, ...