251 search results - page 7 / 51 » Hierarchical Modeling and Simulation of Large Analog Circuit... |
ISQED
2008
IEEE
14 years 1 months ago
2008
IEEE
The effects of random variations during the manufacturing process on devices can be simulated as a variation of transistor parameters. Device degradation, due to temperature or vo...
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
In this paper, we present analog VLSI implementation of a resonate-and-fire neuron (RFN) model, and then consider noise effects on its performance of signal detection. The RFN ci...
FDL
2003
IEEE
14 years 24 days ago
2003
IEEE
This paper proposes a methodology for the extension of SystemC to mixed signal systems. An oscillator made up of an inverter chain has been used to test the accuracy and stability...
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
We consider the problem of testing for delay faults in macrobased circuits. Macro-based circuits are obtained as a result of technology mapping. Gate-level fault models cannot be ...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
A new algorithm is presented that combines performance and variation objectives in a behavioural model for a given analogue circuit topology and process. The tradeoffs between per...