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» Hierarchical Optimization of Asynchronous Circuits
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TCAD
2008
97views more  TCAD 2008»
13 years 7 months ago
Encoding Large Asynchronous Controllers With ILP Techniques
State encoding is one of the most difficult problems in the synthesis of asynchronous controllers. This paper presents a method that can solve the problem of large controllers spec...
Josep Carmona, Jordi Cortadella
ASPDAC
2007
ACM
96views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Hierarchical Optimization Methodology for Wideband Low Noise Amplifiers
In this paper, we present a systematic synthesis methodology for fully integrated wideband low noise amplifiers that simultaneously optimizes impedance matching, noise figure, and ...
Arthur Nieuwoudt, Tamer Ragheb, Yehia Massoud
DAC
2001
ACM
14 years 8 months ago
Performance-Driven Multi-Level Clustering with Application to Hierarchical FPGA Mapping
In this paper, we study the problem of performance-driven multi-level circuit clustering with application to hierarchical FPGA designs. We first show that the performance-driven m...
Jason Cong, Michail Romesis
FPGA
2010
ACM
182views FPGA» more  FPGA 2010»
13 years 5 months ago
A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs
Metastability is a phenomenon that can cause system failures in digital circuits. It may occur whenever signals are being transmitted across asynchronous or unrelated clock domain...
Doris Chen, Deshanand Singh, Jeffrey Chromczak, Da...
FPGA
1998
ACM
125views FPGA» more  FPGA 1998»
13 years 12 months ago
Timing Driven Floorplanning on Programmable Hierarchical Targets
The goal of this paper is to perform a timing optimization of a circuit described by a network of cells on a target structure whose connection delays have discrete values following...
S. A. Senouci, A. Amoura, Helena Krupnova, Gabriel...