34 search results - page 2 / 7 » High Density Through Silicon Via (TSV) |
CORR
2008
Springer
13 years 11 months ago
2008
Springer
Emerging 3D chips stacking and MEMS/Sensors packaging technologies are using DRIE (Deep Reactive Ion Etching) to etch Through-Silicon Via (TSV) for advanced interconnections. The ...
VLSI
2010
Springer
13 years 9 months ago
2010
Springer
—This paper proposes a novel technique to exploit the high bandwidth offered by through silicon vias (TSVs). In the proposed approach, synchronous parallel 3D links are replaced ...
CORR
2008
Springer
13 years 11 months ago
2008
Springer
This special session on 3D TSV
ICCAD
2010
IEEE
13 years 8 months ago
2010
IEEE
In 3D integrated circuits through silicon vias (TSVs) are used to connect different dies stacked on top of each other. These TSV occupy silicon area and have significantly larger a...
DAC
2010
ACM
14 years 2 months ago
2010
ACM
As the geometry shrinking faces severe limitations, 3D wafer stacking with through silicon via (TSV) has gained interest for future SOC integration. Since TSV fill material and s...