71 search results - page 11 / 15 » High capacity associative memories and connection constraint... |
DAC
2006
ACM
14 years 9 months ago
2006
ACM
Highly regular, nanodevice based architectures have been proposed to replace pure CMOS based architectures in the emerging post CMOS era. Since bottom-up self-assembly is used to ...
MICRO
2010
IEEE
13 years 6 months ago
2010
IEEE
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
ICRA
2000
IEEE
14 years 5 days ago
2000
IEEE
This paper describes the progress of the BIP2000 project. This project, in which four laboratories are involved for 4 years, as uimed at the realization of the lower part of an an...
IROS
2009
IEEE
14 years 3 months ago
2009
IEEE
— A major barrier preventing the wide employment of mobile networks of robots in tasks such as exploration, mapping, surveillance, and environmental monitoring is the lack of efï...
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...