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ICSM
2005
IEEE
14 years 3 months ago
A collection of C, C++ and Java code understanding and refactoring plugins
This paper presents the Xrefactory project. Xrefactory is a plugin to editors and Integrated Development Environments (IDE) providing a variety of source understanding and refacto...
Marian Vittek, Peter Borovanský, Pierre-Eti...
DATE
2003
IEEE
117views Hardware» more  DATE 2003»
14 years 3 months ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen
ASAP
2007
IEEE
153views Hardware» more  ASAP 2007»
13 years 9 months ago
Performance Evaluation of Adaptive Routing Algorithms for achieving Fault Tolerance in NoC Fabrics
Commercial designs are integrating from 10 to 100 embedded functional and storage blocks in a single system on chip (SoC) currently, and the number is likely to increase significa...
Haibo Zhu, Partha Pratim Pande, Cristian Grecu
DATE
2008
IEEE
158views Hardware» more  DATE 2008»
14 years 4 months ago
Performance Analysis of SoC Architectures Based on Latency-Rate Servers
This paper presents a method for static performance analysis of SoC architectures. The method is based on a network calculus theory known as LR servers. This network calculus is e...
Jelte Peter Vink, Kees van Berkel, Pieter van der ...
DSD
2006
IEEE
99views Hardware» more  DSD 2006»
14 years 1 months ago
Flexible Bus and NoC Performance Analysis with Configurable Synthetic Workloads
We present a flexible method for bus and network on chip performance analysis, which is based on the adaptation of workload models to resemble various applications. Our analysis m...
Rikard Thid, Ingo Sander, Axel Jantsch