1773 search results - page 34 / 355 » High-level power estimation |
ISCAS
2007
IEEE
14 years 4 months ago
2007
IEEE
—Various instruction and transaction based power estimation techniques for processor and on-chip buses have been proposed in the past. In this paper, we propose a heterogeneous p...
ICCAD
2008
IEEE
14 years 7 months ago
2008
IEEE
In this paper we propose an on-chip bus PMU which makes accurate estimates of system power consumption from a first-order linear power model by utilizing system-level activity in...
ASPDAC
2010
ACM
13 years 8 months ago
2010
ACM
- Dynamic power consumption in CMOS circuits is usually estimated based on the number of signal transitions. However, when considering glitches, this is not accurate because narrow...
DATE
2007
IEEE
14 years 4 months ago
2007
IEEE
— It has been the conventional assumption that, due to the superlinear dependence of leakage power consumption on temperature, and widely varying on-chip temperature profiles, a...
ISLPED
1997
ACM
14 years 1 months ago
1997
ACM
New measures of peak power in the context of sequential circuits are proposed. This paper presents an automatic procedure to obtain very good lower bounds on these measures as wel...