In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
— In this paper, we consider real-time speech traffic, real-time circuit-switched data (CSD) and non-real-time packetswitched data (PSD) in the UMTS Terrestrial Radio Access Net...
Michael Menth, Matthias Schmid, Herbert Heiss, Tho...
Parallel volume rendering offers a feasible solution to the large data visualization problem by distributing both the data and rendering calculations among multiple computers con...
Aleksander Stompel, Kwan-Liu Ma, Eric B. Lum, Jame...
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contri...