537 search results - page 18 / 108 » High-precision interconnect analysis |
DAC
2000
ACM
14 years 8 months ago
2000
ACM
Latency insensitive design has been recently proposed in literature as a way to design complex digital systems, whose functional behavior is robust with respect to arbitrary varia...
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
—With the development of IC technology, it becomes urgent to investigate model reduction method for interconnects with process variations. In this paper, a one-shot projection al...
ISQED
2003
IEEE
14 years 20 days ago
2003
IEEE
The importance of an interconnect pattern density model in ASIC design flow for a 90nm technology is presented. It is shown that performing the timing analysis at the worst-case c...
DAC
2000
ACM
13 years 11 months ago
2000
ACM
Signal integrity analysis has become imperative for high-speed designs. In this paper, we present a new technique to advance Krylov-space based passive model-reduction algorithms ...
DATE
1999
IEEE
13 years 11 months ago
1999
IEEE
Modern IC design requires accurate analysis and modeling of chip-level interconnect, the substrate and package parasitics. Traditional approaches for such analyses are computation...