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DATE
2008
IEEE
148views Hardware» more  DATE 2008»
14 years 2 months ago
Automated Dynamic Throughput-constrained Structural-level Pipelining in Streaming Applications
Stream processing applications such as image signal processing demand high throughput. However, customers increasingly demand runtime flexibility in their designs, which cannot b...
Mark Muir, Tughrul Arslan, Iain Lindsay
HRI
2009
ACM
14 years 2 months ago
An information pipeline model of human-robot interaction
This paper investigates the potential usefulness of viewing the system of human, robot, and environment as an “information pipeline” from environment to user and back again. I...
Kevin Gold
IPPS
2006
IEEE
14 years 1 months ago
Multi-clock pipelined design of an IEEE 802.11a physical layer transmitter
Among different wireless LAN technologies 802.11a has recently become popular due to its high throughput, large system capacity, and relatively long range. In this paper, we prop...
Maryam Mizani, Daler N. Rakhmatov
ARC
2009
Springer
241views Hardware» more  ARC 2009»
14 years 2 months ago
Fully Pipelined Hardware Implementation of 128-Bit SEED Block Cipher Algorithm
As the need for information security increases in our everyday life, the job of encoding/decoding for secure information delivery becomes a critical issue in data network systems. ...
Jaeyoung Yi, Karam Park, Joonseok Park, Won Woo Ro
VLSID
2006
IEEE
144views VLSI» more  VLSID 2006»
14 years 8 months ago
A High-Performance VLSI Architecture for Advanced Encryption Standard (AES) Algorithm
In this paper we present a high-performance, high throughput, and area efficient architecture for the VLSI implementation of the AES algorithm. The subkeys, required for each round...
Naga M. Kosaraju, Murali R. Varanasi, Saraju P. Mo...