479 search results - page 5 / 96 » Implementation and Evaluation of On-Chip Network Architectur... |
EUROPAR
2010
Springer
13 years 7 months ago
2010
Springer
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
— Current Systems-On-Chip execute applications that demand extensive parallel processing. Networks-On-Chip (NoC) provide a structured way of realizing interconnections on silicon...
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
SLIP
2006
ACM
14 years 1 months ago
2006
ACM
— The increasing gap between design productivity and chip complexity and the emerging Systems-On-Chip (SOC) architectural template have led to the wide utilization of reusable ha...
VLSID
2001
IEEE
14 years 7 months ago
2001
IEEE
The emergence of several communication architectures for System-on-Chips provides designers with a variety of design alternatives. In addition, the need to customize the system ar...