801 search results - page 52 / 161 » Implementation and Use of Transactional Memory with Dynamic ... |
PLDI
2010
ACM
14 years 23 days ago
2010
ACM
The availability of multicore processors has led to significant interest in compiler techniques for speculative parallelization of sequential programs. Isolation of speculative s...
CASC
2007
Springer
14 years 1 months ago
2007
Springer
A common way of implementing multivariate polynomial multiplication and division is to represent polynomials as linked lists of terms sorted in a term ordering and to use repeated ...
ISCA
2010
IEEE
14 years 23 days ago
2010
IEEE
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
PODC
2011
ACM
12 years 10 months ago
2011
ACM
We present the Mindicator, a set implementation customized for shared memory runtime systems. The Mindicator is optimized for constant-time querying of its minimum element, while ...
ASAP
2007
IEEE
14 years 2 months ago
2007
IEEE
We present a memory efficient, practical, systolic, parallel architecture for the complete 0/1 knapsack dynamic programming problem, including backtracking. This problem was inte...