4 search results - page 1 / 1 » Implementing Tile-based Chip Multiprocessors with GALS Clock... |
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
TVLSI
2010
13 years 2 months ago
2010
A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost, flexible routing capability, and supports globally asynchronous loc...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Due to high levels of integration and complexity, the design of multi-core SoCs has become increasingly challenging. In particular, energy consumption and distributing a single gl...
ISLPED
2003
ACM
14 years 18 days ago
2003
ACM
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...