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» Implementing a STARI chip
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VLSI
2007
Springer
14 years 3 months ago
Fast estimation of software energy consumption using IPI(Inter-Prefetch Interval) energy model
In this paper, we present the way of fast and accurate estimation of software energy consumption in off-the-shelf processor using IPI(Inter-Prefetch Interval) energy model. In ou...
Jungsoo Kim, Kyungsu Kang, Heejun Shim, Woong Hwan...
FCCM
2006
IEEE
125views VLSI» more  FCCM 2006»
14 years 3 months ago
A Multithreaded Soft Processor for SoPC Area Reduction
The growth in size and performance of Field Programmable Gate Arrays (FPGAs) has compelled System-on-aProgrammable-Chip (SoPC) designers to use soft processors for controlling sys...
Blair Fort, Davor Capalija, Zvonko G. Vranesic, St...
BMCBI
2007
203views more  BMCBI 2007»
13 years 9 months ago
A Grid-based solution for management and analysis of microarrays in distributed experiments
Several systems have been presented in the last years in order to manage the complexity of large microarray experiments. Although good results have been achieved, most systems ten...
Ivan Porro, Livia Torterolo, Luca Corradi, Marco F...
CODES
2005
IEEE
14 years 3 months ago
Spatial division multiplexing: a novel approach for guaranteed throughput on NoCs
To ensure low power consumption while maintaining flexibility and performance, future Systems-on-Chip (SoC) will combine several types of processor cores and data memory units of...
Anthony Leroy, Paul Marchal, Adelina Shickova, Fra...
GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
14 years 3 months ago
SOFTENIT: a methodology for boosting the software content of system-on-chip designs
Embedded software is a preferred choice for implementing system functionality in modern System-on-Chip (SoC) designs, due to the high flexibility, and lower engineering costs pro...
Abhishek Mitra, Marcello Lajolo, Kanishka Lahiri