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» Improved Boundary Scan Design
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DAC
2008
ACM
14 years 10 months ago
Scan chain clustering for test power reduction
An effective technique to save power during scan based test is to switch off unused scan chains. The results obtained with this method strongly depend on the mapping of scan flip-...
Christian G. Zoellin, Hans-Joachim Wunderlich, Jen...
ICCD
2004
IEEE
138views Hardware» more  ICCD 2004»
14 years 6 months ago
A Novel Low-Power Scan Design Technique Using Supply Gating
— Reduction in test power is important to improve battery life in portable devices employing periodic self-test, to increase reliability of testing and to reduce test-cost. In sc...
Swarup Bhunia, Hamid Mahmoodi-Meimand, Saibal Mukh...
BMCBI
2007
226views more  BMCBI 2007»
13 years 10 months ago
MiRFinder: an improved approach and software implementation for genome-wide fast microRNA precursor scans
Background: MicroRNAs (miRNAs) are recognized as one of the most important families of noncoding RNAs that serve as important sequence-specific post-transcriptional regulators of ...
Ting-Hua Huang, Bin Fan, Max F. Rothschild, Zhi-Li...
ISLPED
2005
ACM
68views Hardware» more  ISLPED 2005»
14 years 3 months ago
Two efficient methods to reduce power and testing time
Reducing power dissipation and testing time is accomplished by forming two clusters of don’t-care bit inside an input and a response test cube. New reordering scheme of scan lat...
Il-soo Lee, Tony Ambler
ISQED
2010
IEEE
121views Hardware» more  ISQED 2010»
14 years 2 months ago
A novel two-dimensional scan-control scheme for test-cost reduction
— This paper proposes a two-dimensional scan shift control concept for multiple scan chain design. Multiple scan chain test scheme provides very low scan power by skipping many l...
Chia-Yi Lin, Hung-Ming Chen