29 search results - page 5 / 6 » Improved Fault Emulation for Synchronous Sequential Circuits |
INTEGRATION
2006
13 years 7 months ago
2006
Improving testability during the early stages of high-level synthesis has several benefits including reduced test hardware overheads, reduced test costs, reduced design iterations...
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
In this paper, we propose a diagnostic test generation method in conjunction with an efficient sequential SAT-based diagnosis procedure to precisely identify multiple defective si...
ICCAD
1995
IEEE
13 years 11 months ago
1995
IEEE
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
| This paper reports the design of BIST structures for sequential machines. Testability of an FSM is limited due to the fact that some machine states remain unreachable and some ac...
CAV
2010
Springer
13 years 7 months ago
2010
Springer
ABC is a public-domain system for logic synthesis and formal verification of binary logic circuits appearing in synchronous hardware designs. ABC combines scalable logic transforma...