Abstract. We present a new analysis of the well-known family of multiplicative hash functions, and improved deterministic algorithms for selecting "good" hash functions. ...
In this paper we study the technology mapping problem for FPGA architectures to minimize chip area, or the total number of lookup tables (LUTs) of the mapped design, under the chi...
Content addressable memory (CAM) is frequently used in applications, such as lookup tables, databases, associative computing, and networking, that require high-speed searches due t...
In this paper, we address the problem of simultaneous routing and buffer insertion. Recently in [12, 22], the authors considered simultaneous maze routing and buffer insertion und...
Li-Da Huang, Minghorng Lai, D. F. Wong, Youxin Gao
The logic blocks CLBs of a lookup table LUT based FPGA consist of one or more LUTs, possibly of di erent sizes. In this paper, we focus on technology mapping for CLBs with several...