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115
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ISCA
2006
IEEE
15 years 8 months ago
2006
IEEE
Transactional Memory (TM) simplifies parallel programming by allowing for parallel execution of atomic tasks. Thus far, TM systems have focused on implementing transactional stat...
126
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FPL
2009
Springer
15 years 7 months ago
2009
Springer
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
129
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CODES
2006
IEEE
15 years 4 months ago
2006
IEEE
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and mo...
115
Voted
DATE
2009
IEEE
15 years 9 months ago
2009
IEEE
Abstract—With the increasing scaling of manufacturing technology, process variation is a phenomenon that has become more prevalent. As a result, in the context of Chip Multiproce...
137
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MICRO
2008
IEEE
15 years 9 months ago
2008
IEEE
With the recent design shift towards increasing the number of processing elements in a chip, high-bandwidth support in on-chip interconnect is essential for low-latency communicat...