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CODES
2006
IEEE
14 years 2 months ago
Generic netlist representation for system and PE level design exploration
Designer productivity and design predictability are vital factors for successful embedded system design. Shrinking time-to-market and increasing complexity of these systems requir...
Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah,...
ISCAS
2007
IEEE
161views Hardware» more  ISCAS 2007»
14 years 2 months ago
Hardware Architecture of a Parallel Pattern Matching Engine
Abstract— Several network security and QoS applications require detecting multiple string matches in the packet payload by comparing it against predefined pattern set. This proc...
Meeta Yadav, Ashwini Venkatachaliah, Paul D. Franz...
VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
14 years 9 months ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood
FPGA
2005
ACM
195views FPGA» more  FPGA 2005»
14 years 2 months ago
Sparse Matrix-Vector multiplication on FPGAs
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
Ling Zhuo, Viktor K. Prasanna
ICRA
2006
IEEE
124views Robotics» more  ICRA 2006»
14 years 2 months ago
Stereo based Obstacle Detection for an Unmanned Air Vehicle
— This paper presents the Visual Threat Awareness (VISTA) system for real time collision obstacle detection for an unmanned air vehicle (UAV). Computational stereo performance ha...
Jeffrey Byrne, Martin Cosgrove, Raman K. Mehra