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» Integrating Abduction and Induction
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3DIC
2009
IEEE
279views Hardware» more  3DIC 2009»
14 years 2 months ago
Compact modelling of Through-Silicon Vias (TSVs) in three-dimensional (3-D) integrated circuits
Abstract—Modeling parasitic parameters of Through-SiliconVia (TSV) structures is essential in exploring electrical characteristics such as delay and signal integrity (SI) of circ...
Roshan Weerasekera, Matt Grange, Dinesh Pamunuwa, ...
ISCAS
2008
IEEE
95views Hardware» more  ISCAS 2008»
14 years 2 months ago
Wireless neural signal acquisition with single low-power integrated circuit
—We present experimental results from an integrated circuit designed for wireless neural recording applications. The chip, which was fabricated in a 0.6-µm 2P3M BiCMOS process, ...
Reid R. Harrison, Ryan J. Kier, Bradley Greger, Fl...
ICCD
2001
IEEE
106views Hardware» more  ICCD 2001»
14 years 4 months ago
Pre-routing Estimation of Shielding for RLC Signal Integrity
The formiila-based I<,JJ model is a figiire of merit for the inductive coirpling, and has been used to solve the simrrltaneoris shield insertion and net ordering (SINO) and sim...
James D. Z. Ma, Arvind Parihar, Lei He
DATE
2008
IEEE
125views Hardware» more  DATE 2008»
14 years 2 months ago
Current source based standard cell model for accurate signal integrity and timing analysis
— The inductance and coupling effects in interconnects and non-linear receiver loads has resulted in complex input signals and output loads for gates in the modern deep submicron...
Amit Goel, Sarma B. K. Vrudhula
PKDD
2001
Springer
104views Data Mining» more  PKDD 2001»
14 years 2 days ago
Data Reduction Using Multiple Models Integration
Large amount of available information does not necessarily imply that induction algorithms must use all this information. Samples often provide the same accuracy with less computat...
Aleksandar Lazarevic, Zoran Obradovic