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» Intrabody Buses for Data and Power
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ICCAD
2000
IEEE
188views Hardware» more  ICCAD 2000»
13 years 11 months ago
Bus Optimization for Low-Power Data Path Synthesis Based on Network Flow Method
— Sub-micron feature sizes have resulted in a considerable portion of power to be dissipated on the buses, causing an increased attention on savings for power at the behavioral l...
Sungpack Hong, Taewhan Kim
PATMOS
2004
Springer
14 years 22 days ago
A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-Chip Buses
Abstract. Crosstalk causes logical errors due to data dependent delay degradation as well as energy consumption and is considered the biggest signal integrity challenge for long on...
Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan
CORR
2011
Springer
243views Education» more  CORR 2011»
13 years 2 months ago
Distributed Estimation and False Data Detection with Application to Power Networks
This work presents a distributed method for control centers in a power network to estimate the operating condition of the power plant, and to ultimately determine the occurrence o...
Fabio Pasqualetti, Ruggero Carli, Francesco Bullo
ISLPED
2005
ACM
100views Hardware» more  ISLPED 2005»
14 years 29 days ago
A tunable bus encoder for off-chip data buses
Off-Chip buses constitute a significant portion of the total system power in embedded systems. Past research has focused on encoding contiguous bit positions in data values to red...
Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Wa...
ICCD
2005
IEEE
109views Hardware» more  ICCD 2005»
14 years 4 months ago
VALVE: Variable Length Value Encoder for Off-Chip Data Buses.
We propose VAriable Length Value Encoding (VALVE) technique to reduce the power consumption in the off-chip data buses. While past research has focused on encoding fixed length da...
Dinesh C. Suresh, Banit Agrawal, Walid A. Najjar, ...