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CODES
2009
IEEE
14 years 18 days ago
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
Vincenzo Rana, Srinivasan Murali, David Atienza, M...
DAC
2008
ACM
14 years 9 months ago
Design of high performance pattern matching engine through compact deterministic finite automata
Pattern matching relies on deterministic finite automata (DFA) to search for predefined patterns. While a bit-DFA method is recently proposed to exploit the parallelism in pattern...
Piti Piyachon, Yan Luo
DAC
1996
ACM
14 years 28 days ago
A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts
Abstract -- This paper introduces a new HW/SW partitioning algorithm used in automating the instruction set processor design for pipelined ASIP (Application Specific Integrated Pro...
Nguyen-Ngoc Bình, Masaharu Imai, Akichika S...
COMPUTER
2000
128views more  COMPUTER 2000»
13 years 8 months ago
What's Ahead for Embedded Software?
hysical world. How do you adapt software abstractions designed merely to transform data to meet requirements like real-time constraints, concurrency, and stringent safety considera...
Edward A. Lee
DAC
1999
ACM
14 years 1 months ago
On ILP Formulations for Built-In Self-Testable Data Path Synthesis
In this paper, we present a new method to the built-in selftestable data path synthesis based on integer linear programming (ILP). Our method performs system register assignment, ...
Han Bin Kim, Dong Sam Ha, Takeshi Takahashi