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» Leakage Controlled Read Stable Static Random Access Memories
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JCP
2008
141views more  JCP 2008»
13 years 10 months ago
Leakage Controlled Read Stable Static Random Access Memories
Semiconductor manufacturing process scaling increases leakage and transistor variations, both of which are problematic for static random access memory (SRAM). Since SRAM is a criti...
Sayeed A. Badrudduza, Ziyan Wang, Giby Samson, Law...
VLSID
2009
IEEE
119views VLSI» more  VLSID 2009»
14 years 11 months ago
Single Ended Static Random Access Memory for Low-Vdd, High-Speed Embedded Systems
Abstract-- Single-ended static random access memory (SESRAM) is well known for their tremendous potential of low active power and leakage dissipations. In this paper, we present a ...
Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhi...
ISCAS
2007
IEEE
132views Hardware» more  ISCAS 2007»
14 years 5 months ago
High Read Stability and Low Leakage Cache Memory Cell
- Data in conventional six transistor (6T) static random access memory (SRAM) cells are vulnerable to noise due to the direct access to the data storage nodes through the bit lines...
Zhiyu Liu, Volkan Kursun
VLSID
2010
IEEE
211views VLSI» more  VLSID 2010»
14 years 2 months ago
A Combined DOE-ILP Based Power and Read Stability Optimization in Nano-CMOS SRAM
A novel design approach for simultaneous power and stability (static noise margin, SNM) optimization of nanoCMOS static random access memory (SRAM) is presented. A 45nm single-end...
Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dh...