Sciweavers

137 search results - page 7 / 28
» Leakage power modeling and reduction with data retention
Sort
View
ICCAD
2004
IEEE
125views Hardware» more  ICCAD 2004»
14 years 5 months ago
Simultaneous communication and processor voltage scaling for dynamic and leakage energy reduction in time-constrained systems
In this paper, we propose a new technique for the combined voltage scaling of processors and communication links, taking into account dynamic as well as leakage power consumption....
Alexandru Andrei, Marcus T. Schmitz, Petru Eles, Z...
ISLPED
2005
ACM
102views Hardware» more  ISLPED 2005»
14 years 2 months ago
Snug set-associative caches: reducing leakage power while improving performance
As transistors keep shrinking and on-chip data caches keep growing, static power dissipation due to leakage of caches takes an increasing fraction of total power in processors. Se...
Jia-Jhe Li, Yuan-Shin Hwang
INTEGRATION
2007
107views more  INTEGRATION 2007»
13 years 8 months ago
Power and electromagnetic analysis: Improved model, consequences and comparisons
Since their publication in 1998 and 2001 respectively, Power and Electromagnetic Analysis (SPA, DPA, EMA) have been successfully used to retrieve secret information stored in cryp...
Eric Peeters, François-Xavier Standaert, Je...
ICCD
2002
IEEE
93views Hardware» more  ICCD 2002»
14 years 5 months ago
Impact of Scaling on the Effectiveness of Dynamic Power Reduction Schemes
Power is considered to be the major limiter to the design of more faster and complex processors in the near future. In order to address this challenge, a combination of process, c...
David Duarte, Narayanan Vijaykrishnan, Mary Jane I...
TVLSI
2008
153views more  TVLSI 2008»
13 years 8 months ago
Characterization of a Novel Nine-Transistor SRAM Cell
Data stability of SRAM cells has become an important issue with the scaling of CMOS technology. Memory banks are also important sources of leakage since the majority of transistors...
Zhiyu Liu, Volkan Kursun